Web-oriented educational system for digital circuits modeling and simulation

To foster students learning on digital logics and digital circuits design, theory lessons should be closely intertwined with practical exercises and experimentation. In this paper, we will present a web oriented educational system for digital circuits modeling and simulation – VHDLLab. Using VHDLLab students can experiment with simple or complex digital circuits and verify their knowledge on circuit construction and behavior. Most important advantages of this system when compared with commercially available VHDL environments and simulators are small size, no-licencing, free of charge, and design adjusted to students.